1. Field of the Invention
This invention relates generally to voltage-controlled oscillators, and more particularly to voltage-controlled oscillators formed in semiconductor material.
2. Related Art
Fixed frequency oscillators are typically devices formed out of semiconductor materials that generate an oscillating voltage in response to a direct current (DC) voltage being applied. Oscillators are often used as clocks in digital applications such as computers and signal sources in Radio Frequency (RF) applications such as cellular telephones. It is also known that combining a frequency selective network and an active device to sustain oscillation forms a fixed frequency oscillator. Turning to FIG. 1, a schematic diagram of a known fixed frequency oscillator 100 is illustrated. The schematic diagram 100 shows a frequency selective network 102 in electrical communication with an active device 104. The frequency selective network 102 may be implemented with a capacitor 106 placed in parallel with an inductor 108. The active device 104 may be represented by a negative resistor 110 connected in parallel with another capacitor 112 and functions to sustain the voltage oscillation by offsetting the losses associated with the frequency selective network.
It is also known that an oscillator may be created that responds to changes in voltage. A change in voltage results in a corresponding change in the oscillation frequency of the oscillator. Such an oscillator is commonly referred to as a voltage-controlled oscillator (VCO). In FIG. 2, a schematic diagram of a known VCO 200 is illustrated. The schematic diagram 200 shows a variable frequency selective network 202 in electrical communication with an active device 204. The variable frequency selective network 202 may have a voltage variable capacitor, commonly referred to as a varactor 206 in parallel with an inductor 208. The varactor 206 may be implemented in an integrated circuit as a reverse biased diode that exhibits a capacitance that varies with applied DC voltage. A typical varactor in a semiconductor may exhibit a capacitance change of fifty percent. The varactor capacitance change combined with the other fixed capacitances in the frequency selective network 202 may result in a ten to twenty percent change in VCO frequency. The active device 204 may be represented by a capacitor 210 in parallel with a negative resistor 212 that sustains the oscillation by offsetting the losses associated with the frequency selective network 202.
Typical single VCOs formed in a semiconductor material have a frequency selective network that determines the frequency range of the single VCO. Further, the single VCOs constructed using varactors are typically narrowband devices with a tuning range of ten to twenty percent. The tuning range is represented by the formula: Fmax=1.1 Fmin or Fmax =1.2 Fmin. Many RF communication applications, however, require wider frequency range coverage with an Fmax greater than 2 Fmin.
A common approach to attaining an Fmax of 2 Fmin or more range coverage involves adding additional VCOs. But such an approach requires additional area on a semiconductor wafer. The additional area translates to additional cost and interconnections which degrade the VCO performance due to parasitic effects. Another known approach is to add band-shifting capability to a single VCO as shown in FIG. 3 and FIG. 4.
In FIG. 3, a circuit diagram 300 of a known frequency selective network 300 is illustrated. In FIG. 3, the frequency selective network 300 has a varactor 302 in parallel with inductor 304. An additional capacitor 306 may be connected in parallel with varactor 302 by switch 308 being closed. Further, an additional capacitor 310 may be connected in parallel with capacitor 306 and varactor 302 by switch 312 being closed in addition to switch 308 being in the closed position. The additional capacitance that is switched into the frequency selective network 300 shifts the tuning range of the circuit. Such an approach may occur in a MOSFET implementation. The drawbacks with such an implementation include the current losses that occur due to interconnections between capacitors/switches, the additional current loss caused by the switches or capacitors, and the increase in area that is required in a semiconductor chip having such an implementation.
In FIG. 4, a known frequency selective network 400 is illustrated. The frequency selective network 400 has a varactor 402 connected to an inductor 404. An additional inductor 406 is switched into the circuit in parallel with varactor 402 by switch 408. Yet another inductor 410 may be switched into the circuit in parallel with the varactor 402 and inductor 406 by switch 412. The additional inductance that is switched into the frequency selective network 400 results in the shifting of the tuning range of the circuit. The drawbacks with this implementation is the losses that occur due to interconnects between inductors/switches, the current losses within the switches and the additional inductors, as well as the increased space requirements on a semiconductor chip that incorporates such a VCO.
The frequency selective networks as shown in FIG. 4 may be implemented in semiconductor material such as CMOS, GaAs and BiCMOS. Traditional implementations of multiple inductors in semiconductor material place the inductors next to each other and then locate the additional VCO's electronic circuitry around the outside of the inductors. Such arrangements require separate space around each individual inductor and the additional VCO circuitry of switches and capacitors that enable band shifting. Known layouts of VCO circuitry in semiconductor material also require a number of interconnections between the electronic circuitry that is spread out around the outside of the inductors.
FIG. 5 illustrates a known VCO semiconductor layout 500 implementing the circuit of FIG. 4. The semiconductor layout 500 has a plurality of inductors 502, 504, 506, 508, 510, 512, 514, 516, 518, 520, 522, and 524. The inductors 514 and 516 have more metal than inductors 510 and 512. This is because when inductors are connected in parallel the resultant inductance is given by the equation:       L    T    =                    L        1            ⁢              L        2                            L        1            +              L        2            where LT is the total inductance of L1 and L2 in parallel. Thus when L1=3H and L2=3H, LT=3/2H. The total inductance always decreases when inductors are connected in parallel, the amount being dependent on the individual inductance values. The additional electrical circuitry may be seen around the outside of inductors 502, 504, 506, 508, 510, 512, 514, 516, 518, 520, 522, and 524.
Therefore, there is a need for methods and systems for increasing the tuning range of a VCO that overcomes the disadvantages set forth above and others previously described.